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Semicon 2.0: ₹1.27 Lakh Crore Semiconductor Push [Prelims Bits]

02 Sep 2026

Tags: Prelims   Economic and Social Development

Source: The Indian Express

  • Context: Centre notified the operational framework of Semicon 2.0, approved in July 2026, with ₹1.27 lakh crore support to strengthen India’s semiconductor ecosystem, especially domestic chip design.
  • Six pillars: Government support covers chip design, semiconductor manufacturing, equipment, raw materials, fabrication (fabs) and advanced packaging, with at least 3 pillars focused on chip design.
  • Strategic chip design: C-DAC (Centre for Development of Advanced Computing) will identify key technologies/IP and select developers through competitive bidding; resulting IP will be jointly owned by the developer and C-DAC.
  • Commercial chip design: Eligible Indian fabless companies get access to Electronic Design Automation (EDA) tools, IP cores, multi-project wafer fabrication, compute subsystems and post-silicon validation.
  • Start-ups/MSMEs: Seed funding up to ₹15 crore or 50% of project cost, whichever is lower; government may also co-invest with VC/PE investors.
  • Eligibility: India-incorporated and headquartered companies owned/controlled by Indian citizens or Overseas Citizens of India (OCIs), with significant Indian operations/manpower, can qualify.
  • Royalty financing: Larger companies repay government support through 5% of product net revenue, until 1.5× the government’s financial support is recovered.
  • Supply-chain support: Capital expenditure support for semiconductor equipment, wafers, photomasks, photoresists, substrates, chemicals, gases and testing facilities.
  • Equipment manufacturers: Production-linked incentive of 10%, 8%, 6%, 4% and 2% over five years from FY 2028–29, linked to domestically sourced Bill of Materials; combined support capped at 50% of eligible capex.
  • Prelims Edge: Fabless companies design semiconductor chips but do not manufacture them in their own fabrication plants; manufacturing is outsourced to semiconductor foundries.

Prelims Question

Q1. With reference to Semicon 2.0, consider the following statements:

  1. The framework seeks to support the semiconductor ecosystem across both chip design and physical manufacturing-related activities.
  2. Under the strategic chip-design component, intellectual property developed through supported projects is to be owned exclusively by the Central Government.
  3. Indian fabless companies can receive support for access to Electronic Design Automation tools and multi-project wafer fabrication.
  4. Start-ups and MSMEs may receive seed funding even without bearing the entire project cost themselves.

Which of the statements given above are correct?

A. 1, 3 and 4 only
B. 1 and 2 only
C. 2, 3 and 4 only
D. 1, 2, 3 and 4

Answer: A

Explanation:

  • Statement 1 — Correct: Semicon 2.0 covers design, manufacturing, equipment, raw materials, fabs and advanced packaging.
  • Statement 2 — Incorrect: Strategic chip-design IP is jointly owned by the developer and C-DAC, not exclusively by the government.
  • Statement 3 — Correct: Fabless firms can access EDA tools, IP cores, multi-project wafer fabrication, compute subsystems and post-silicon validation.
  • Statement 4 — Correct: Start-ups/MSMEs can receive up to ₹15 crore or 50% of project cost, whichever is lower, implying partial government financing.

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